Electronic Components Datasheet Search
  English  ▼

X  

PCF85263ATL/A Datasheet(PDF) 69 Page - NXP Semiconductors

Part # PCF85263ATL/A
Description  Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus
PDF  92 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF85263ATL/A Datasheet(HTML) 69 Page - NXP Semiconductors

Back Button PCF85263ATL/A Datasheet HTML 65Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 66Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 67Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 68Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 69Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 70Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 71Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 72Page - NXP Semiconductors PCF85263ATL/A Datasheet HTML 73Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 69 / 92 page
background image
NXP Semiconductors
PCF85263A
Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus
aaa-010607
0
1
2
3
4
5
6
-0.4
-0.2
0
0.2
0.4
VDD (V)
Δfosc/fosc
Δfosc/fosc
(ppm)
(ppm)
(1)
(1)
(2)
(2)
(3)
(3)
Tamb = 25 °C.
1. CL(itg) = 12.5 pF.
2. CL(itg) = 6 pF.
3. CL(itg) = 7 pF.
Figure 42. Oscillator frequency variation with respect to VDD
VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = -40 °C to +85 °C; fosc = 32.768 kHz; quartz Rs = 60 kΩ; CL = 7 pF; unless otherwise
specified. All timing values are valid within the operating supply voltage and temperature range and referenced to VIL and
VIH with an input voltage swing of VSS to VDD [1] .
Symbol
Parameter
Conditions
Min
Max
Unit
Cb
capacitive load for
each bus line
-
400
pF
fSCL
SCL clock frequency
[2] 0
400
kHz
tHD;STA
hold time (repeated)
START condition
0.6
-
μs
tSU;STA
set-up time for a
repeated START
condition
0.6
-
μs
tLOW
LOW period of the
SCL clock
1.3
-
μs
tHIGH
HIGH period of the
SCL clock
0.6
-
μs
tr
rise time of both SDA
and SCL signals
20
300
ns
tf
fall time of both SDA
and SCL signals
[3] [4] 20 × (VDD / 5.5 V) 300
ns
tBUF
bus free time between
a STOP and START
condition
1.3
-
μs
tSU;DAT
data set-up time
100
-
ns
Table 68. I2C-bus characteristics
PCF85263A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 5 — 1 February 2021
69 / 92



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com