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DAC39RF10 Datasheet(PDF) 110 Page - Texas Instruments |
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DAC39RF10 Datasheet(HTML) 110 Page - Texas Instruments |
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110 / 232 page ![]() NCO Output Frequency changed to frequency 2 Frequency changed to frequency 1 Figure 7-44. Example Phase Continuous NCO Mode Operation 7.3.6.1.2.2 Phase-coherent NCO Update Mode The phase-coherent NCO update mode, the frequency word is updated and is multiplied by a counter to update the accumulator. This allows the phase for a particular frequency to be "coherent" with the previous usage of the frequency as if the NCO had never been tuned away from that frequency. Since the phase information is maintained by the counter, any frequency can be phase coherent. Phase Coherent NCO Mode operation is demonstrated in Figure 7-45 and selected by programming NCO_CONT = 0 and NCO_AR = 0. If alignment between multiple devices is required, then NCO_AR must be programmed to 1 during the initial NCO synchronization to align the master accumulator for all devices. Frequency 1 Frequency 2 NCO Output Frequency changed to frequency 2 Frequency changed to frequency 1 Figure 7-45. Example Phase Coherent NCO Mode Operation 7.3.6.1.2.3 Phase-sync NCO Update Mode In Phase-sync NCO update mode, the frequency word is updated (if it changed) and the accumulator is reset. This mode can be used to align the NCOs across multiple devices by providing a synchronization signal simultaneously across all devices. This mode is selected by programming NCO_AR = 1. 7.3.6.1.2.4 NCO Synchronization Many systems required synchronization between DAC channels including the phase of the internal NCOs when using digital up-conversion features. Further, frequency hopping systems may have additional requirements for synchronized frequency hopping to maintain NCO synchronization during changes in NCO frequency. The device has a number of ways to update NCO changes. These include: • Synchronization through the LSB of the "I" input of DUC0 in the JESD204C input data stream • Synchronization through SYSREF • Update through SPI_SYNC register bit • Update on the rising edge of FRCS of the FRI interface if the FRS bit is set. DAC39RF10-SP, DAC39RF10-SEP DAC39RFS10-SP, DAC39RFS10-SEP SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026 www.ti.com 110 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP |
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