Electronic Components Datasheet Search
  English  ▼

X  

DAC39RF10 Datasheet(PDF) 114 Page - Texas Instruments

Part # DAC39RF10
Description  DAC39RFx10-SP DAC39RFx10-SEP 10.4 or 20.8GSPS, 16-bit, Dual and Single Channel, Multi-Nyquist Digital-to-Analog Converter (DAC) with JESD204C Interface
PDF  232 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DAC39RF10 Datasheet(HTML) 114 Page - Texas Instruments

Back Button DAC39RF10 Datasheet HTML 110Page - Texas Instruments DAC39RF10 Datasheet HTML 111Page - Texas Instruments DAC39RF10 Datasheet HTML 112Page - Texas Instruments DAC39RF10 Datasheet HTML 113Page - Texas Instruments DAC39RF10 Datasheet HTML 114Page - Texas Instruments DAC39RF10 Datasheet HTML 115Page - Texas Instruments DAC39RF10 Datasheet HTML 116Page - Texas Instruments DAC39RF10 Datasheet HTML 117Page - Texas Instruments DAC39RF10 Datasheet HTML 118Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 114 / 232 page
background image
Normalized Frequency (/FCLK)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
DES2XL
DES2XH
Figure 7-48. DES Interpolator Frequency Response
Normalized Frequency (/FCLK)
0
0.04 0.08 0.12 0.16 0.2 0.24 0.28 0.32 0.36 0.4
-0.1
-0.08
-0.06
-0.04
-0.02
0
0.02
0.04
0.06
0.08
0.1
Figure 7-49. DES Interpolator Frequency Response
(Passband)
7.3.7 JESD204C Interface
The devices uses a JESD204C high-speed serial interface to transfer data from the logic device to the receiving
DAC. The device serial lanes are capable of operating with both 8b/10b encoding and 64b/66b encoding. The
JESD204C formats using 8b/10b encoding are backwards compatible with existing JESD204B receivers. A
maximum of 16 lanes can be used to lower lane rates for interfacing with speed limited logic devices. There are
a few differences between 8b/10b and 64b/66b encoding, which is highlighted throughout this section. Figure
7-50 shows a simplified block diagram of the 8b/10b encoded JESD204C interface and Figure 7-51 shows a
simplified block diagram of the 64b/66b encoded JESD204C interface.
DAC
TRANSPORT
LAYER
SCRAMBLER
(Optional)
SERDES
TX PHY
8b/10b
LINK LAYER
APPLICATION
LAYER
TRANSPORT
LAYER
DESCRAMBLE
(Optional)
SERDES
RX PHY
8b/10b
LINK LAYER
Logic Device
JESD204B or JESD204C Block
DAC Device
JESD204C Block
ANALOG
CHANNEL
Figure 7-50. Simplified JESD204C Interface Diagram with 8b/10b Encoding
DAC39RF10-SP, DAC39RF10-SEP
DAC39RFS10-SP, DAC39RFS10-SEP
SBAS932A – MARCH 2024 – REVISED FEBRUARY 2026
www.ti.com
114
Submit Document Feedback
Copyright © 2026 Texas Instruments Incorporated
Product Folder Links: DAC39RF10-SP DAC39RF10-SEP DAC39RFS10-SP DAC39RFS10-SEP



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com