MIC2131 datasheet(11/20 Pages) MICREL

11 / 20 page

Micrel, Inc.

MIC2130/1

April 2008

M9999-042108-C

be disabled during an over current condition.

Under Voltage

A ±6% comparator monitors the output voltage and will

initiate the fast hysteretic control loop (FHyCL) to

regulate the output. A comparator monitors the output

voltage and sets PGOOD true when the output reaches

90% of the regulated output.

Over Voltage

If the voltage at the FB pin is detected to be 15% higher

than nominal for >2µs, then the controller is stopped

from switching immediately and latched off. Switching

can be re-started by taking EN below the channel’s

enable threshold and re-enabling or re-cycling power to

the IC.

Figure 5.

During the normal operation of a synchronous Buck

regulator, as the lower MOSFET is switched on, its drain

voltage will become negative with respect to ground as

the inductor current continues to flow from Source-to-

Drain. This negative voltage is proportional to output

load current, inductor ripple current and MOSFET

RDSON.

Figure 6.

The larger the inductor current, the more negative VDS

becomes. This is utilized for the detection of over current

by passing a known fixed current source (200µA)

through a resistor RCS which sets up an offset voltage

such that when 200µA x RCS = IDRAIN x RDSON the

MIC2130/31’s over current trigger is set. This disables

the next high side gate drive pulse. After missing the

high side pulse, the over current (OC) trigger is reset. If

on the next low side drive cycle, the current is still too

high i.e., VCS is ≤ 0V, another high side pulse is missed

and so on. Thus reducing the overall energy transferred

to the output and VOUT starts to fall. As this successive

missing of pulses results in an effectively lower switching

frequency, power inductor ripple currents can get very

high if left unlimited. The MIC2130/31 therefore limits

Duty Cycle during current limit to prevent currents

building up in the power inductor and output capacitors.

Current Limit Setting

The Simple Method

RCS = IOUT x RDSON(max)/200µA.

Accurate Method

For designs where ripple current is significant when

compared to IOUT, or for low duty cycle operation,

calculating the current setting resistor RCS should take

into account that one is sensing the peak inductor

current and that there is a blanking delay of

approximately 100ns.

Figure 7.

RIPPLE

OUT

SWITCH

OUT

RIPPLE

⋅

−

⋅

)

(

DLY

OUT

SET

⋅

−

(min)

(max)

SET

RDS

⋅

D = Duty Cycle

FSWITCH = Switching Frequency

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