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DRA752ABC Datasheet(PDF) 152 Page - Texas Instruments |
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DRA752ABC Datasheet(HTML) 152 Page - Texas Instruments |
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152 / 443 page  152 DRA756, DRA755, DRA754, DRA752 DRA751, DRA750, DRA746, DRA745, DRA744 SPRS950F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744 Specifications Copyright © 2015–2019, Texas Instruments Incorporated Table 5-9. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name GPIO7 GPIO7_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE GPIO7_DBCLK Func 0.032 GPIO_GFCLK FUNC_32K_CLK OSC1 PIDBCLK Func 0.032 GPIO_GFCLK RTC Oscillator GPIO8 GPIO8_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE GPIO8_DBCLK Func 0.032 GPIO_GFCLK FUNC_32K_CLK OSC1 PIDBCLK Func 0.032 GPIO_GFCLK RTC Oscillator GPMC GPMC_FCLK Int 266 L3MAIN1_L3_GICLK CORE_X2_CLK DPLL_CORE GPU GPU_FCLK1 Func GPU_CLK GPU_CORE_GCLK CORE_GPU_CLK DPLL_CORE PER_GPU_CLK DPLL_PER GPU_GCLK DPLL_GPU GPU_FCLK2 Func GPU_CLK GPU_HYD_GCLK CORE_GPU_CLK DPLL_CORE PER_GPU_CLK DPLL_PER GPU_GCLK DPLL_GPU GPU_ICLK Int 266 GPU_L3_GICLK CORE_X2_CLK DPLL_CORE HDMI PHY DSS_HDMI_PHY_ CLK Func 38.4 HDMI_PHY_GFCLK FUNC_192M_CLK DPLL_PER HDQ1W HDQ1W_ICLK Int & Func 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE HDQ1W_FCLK Func 12 PER_12M_GFCLK FUNC_192M_CLK DPLL_PER I2C1 I2C1_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C1_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C2 I2C2_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C2_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C3 I2C3_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C3_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C4 I2C4_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE I2C4_FCLK Func 96 PER_96M_GFCLK FUNC_192M_CLK DPLL_PER I2C5 I2C5_ICLK Int 266 IPU_L3_GICLK CORE_X2_CLK DPLL_CORE I2C5_FCLK Func 96 IPU_96M_GFCLK FUNC_192M_CLK DPLL_PER IEEE1500_2_OCP PI_L3CLK Int & Func 266 L3INIT_L3_GICLK CORE_X2_CLK DPLL_CORE IPU1 IPU1_GFCLK Int & Func 425.6 IPU1_GFCLK DPLL_ABE_X2_CL K DPLL_ABE CORE_IPU_ISS_B OOST_CLK DPLL_CORE IPU2 IPU2_GFCLK Int & Func 425.6 IPU2_GFCLK CORE_IPU_ISS_B OOST_CLK DPLL_CORE IVA IVA_GCLK Int IVA_GCLK IVA_GCLK IVA_GFCLK DPLL_IVA KBD KBD_FCLK Func 0.032 WKUPAON_SYS_GFC LK WKUPAON_32K_G FCLK OSC1 PICLKKBD Func 0.032 WKUPAON_SYS_GFC LK RTC Oscillator KBD_ICLK Int 38.4 WKUPAON_GICLK SYS_CLK1 OSC1 PICLKOCP Int 38.4 WKUPAON_GICLK DPLL_ABE_X2_CL K DPLL_ABE L3_INSTR L3_CLK Int L3_CLK L3INSTR_L3_GICLK CORE_X2_CLK DPLL_CORE L3_MAIN L3_CLK1 Int L3_CLK L3MAIN1_L3_GICLK CORE_X2_CLK DPLL_CORE L3_CLK2 Int L3_CLK L3INSTR_L3_GICLK CORE_X2_CLK DPLL_CORE |
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