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DRA752ABC Datasheet(PDF) 150 Page - Texas Instruments |
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DRA752ABC Datasheet(HTML) 150 Page - Texas Instruments |
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150 / 443 page  150 DRA756, DRA755, DRA754, DRA752 DRA751, DRA750, DRA746, DRA745, DRA744 SPRS950F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744 Specifications Copyright © 2015–2019, Texas Instruments Incorporated Table 5-9. Maximum Supported Frequency (continued) Module Clock Sources Instance Name Input Clock Name Clock Type Max. Clock Allowed (MHz) PRCM Clock Name PLL / OSC / Source Clock Name PLL / OSC / Source Name DSS DSS_HDMI_CEC_ CLK Func 0.032 HDMI_CEC_GFCLK SYS_CLK1/610 OSC1 DSS_HDMI_PHY_ CLK Func 48 HDMI_PHY_GFCLK FUNC_192M_CLK DPLL_PER DSS_CLK Func 192 DSS_GFCLK DSS_CLK DPLL_PER HDMI_CLKINP Func 38.4 HDMI_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DSS_L3_ICLK Int 266 DSS_L3_GICLK CORE_X2_CLK DPLL_CORE VIDEO1_CLKINP Func 38.4 VIDEO1_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 VIDEO2_CLKINP Func 38.4 VIDEO2_DPLL_CLK SYS_CLK1 OSC1 SYS_CLK2 OSC2 DPLL_DSI1_A_CL K1 Func 209.3 N/A HDMI_CLK DPLL_HDMI VIDEO1_CLKOUT1 DPLL_VIDEO1 DPLL_DSI1_B_CL K1 Func 209.3 N/A VIDEO1_CLKOUT3 DPLL_VIDEO1 VIDEO2_CLKOUT3 DPLL_VIDEO2 HDMI_CLK DPLL_HDMI DPLL_ABE_X2_CL K DPLL_ABE DPLL_DSI1_C_CL K1 Func 209.3 N/A HDMI_CLK DPLL_HDMI VIDEO1_CLKOUT3 DPLL_VIDEO1 VIDEO2_CLKOUT1 DPLL_VIDEO2 DPLL_HDMI_CLK1 Func 185.6 N/A HDMI_CLK DPLL_HDMI DSS DISPC LCD1_CLK Func 209.3 N/A DPLL_DSI1_A_CL K1 See DSS data in the rows above DSS_CLK LCD2_CLK Func 209.3 N/A DPLL_DSI1_B_CL K1 DSS_CLK LCD3_CLK Func 209.3 N/A DPLL_DSI1_C_CL K1 DSS_CLK F_CLK Func 209.3 N/A DPLL_DSI1_A_CL K1 DPLL_DSI1_B_CL K1 DPLL_DSI1_C_CL K1 DSS_CLK DPLL_HDMI_CLK1 EFUSE_CTRL_CU ST ocp_clk Int 133 CUSTEFUSE_L4_GICL K CORE_X2_CLK DPLL_CORE sys_clk Func 38.4 CUSTEFUSE_SYS_GF CLK SYS_CLK1 OSC1 ELM ELM_ICLK Int 266 L4PER_L3_GICLK CORE_X2_CLK DPLL_CORE EMIF_OCP_FW L3_CLK Int 266 EMIF_L3_GICLK CORE_X2_CLK DPLL_CORE EMIF_PHY1 EMIF_PHY1_FCLK Func DDR EMIF_PHY_GCLK EMIF_PHY_GCLK DPLL_DDR EMIF_PHY2 EMIF_PHY2_FCLK Func DDR EMIF_PHY_GCLK EMIF_PHY_GCLK DPLL_DDR |
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