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DRA752ABC Datasheet(PDF) 120 Page - Texas Instruments |
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DRA752ABC Datasheet(HTML) 120 Page - Texas Instruments |
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120 / 443 page  120 DRA756, DRA755, DRA754, DRA752 DRA751, DRA750, DRA746, DRA745, DRA744 SPRS950F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744 Terminal Configuration and Functions Copyright © 2015–2019, Texas Instruments Incorporated Table 4-16. Universal Serial Bus Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL usb3_ulpi_d7 USB3 - ULPI 8-bit data bus IO AC5 / AF2 usb3_ulpi_nxt USB3 - ULPI next I AC8 / AE2 usb3_ulpi_dir USB3 - ULPI bus direction I AD6 / AE6 usb3_ulpi_stp USB3 - ULPI stop O AB8 / AD2 usb3_ulpi_clk USB3 - ULPI functional clock I AB5 / AD3 Universal Serial Bus 4 usb4_ulpi_d0 USB4 - ULPI 8-bit data bus (1) IO V6 usb4_ulpi_d1 USB4 - ULPI 8-bit data bus (1) IO U6 usb4_ulpi_d2 USB4 - ULPI 8-bit data bus (1) IO U5 usb4_ulpi_d3 USB4 - ULPI 8-bit data bus (1) IO V5 usb4_ulpi_d4 USB4 - ULPI 8-bit data bus (1) IO V4 usb4_ulpi_d5 USB4 - ULPI 8-bit data bus (1) IO V3 usb4_ulpi_d6 USB4 - ULPI 8-bit data bus (1) IO Y2 usb4_ulpi_d7 USB4 - ULPI 8-bit data bus (1) IO W2 usb4_ulpi_nxt USB4 - ULPI next (1) I U7 usb4_ulpi_dir USB4 - ULPI bus direction (1) I V7 usb4_ulpi_stp USB4 - ULPI stop (1) O V9 usb4_ulpi_clk USB4 - ULPI functional clock (1) I W9 (1) USB4 will not be supported on some pin-compatible roadmap devices. USB3 will be mapped to these balls instead. Pin compatibility can be maintained in the future by either not using USB4, or via software change to use USB4 on this device, but USB3 on these balls in the future. 4.4.14 SATA NOTE For more information, see the Serial Communication Interfaces / SATA section of the device TRM. Table 4-17. SATA Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL sata1_rxn0 SATA differential negative receiver lane 0 IOS AH9 sata1_rxp0 SATA differential positive receiver lane 0 IOS AG9 sata1_txn0 SATA differential negative transmitter lane 0 ODS AG10 sata1_txp0 SATA differential positive transmitter lane 0 ODS AH10 sata1_led SATA channel activity indicator O A22 / G19 4.4.15 Peripheral Component Interconnect Express (PCIe) NOTE For more information, see the Serial Communication Interfaces / PCIe Controllers and the Shared PHY Component Subsystems / PCIe Shared PHY Susbsytem sections of the device TRM. |
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