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DRA752ABC Datasheet(PDF) 131 Page - Texas Instruments |
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DRA752ABC Datasheet(HTML) 131 Page - Texas Instruments |
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131 / 443 page  131 DRA756, DRA755, DRA754, DRA752 DRA751, DRA750, DRA746, DRA745, DRA744 www.ti.com SPRS950F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744 Terminal Configuration and Functions Copyright © 2015–2019, Texas Instruments Incorporated (1) gpio8_30 is multiplexed with EMU0 and gpio8_31 is multiplexed with EMU1. These pins will be sampled at reset release by the test and emulation logic. Therefore, if they are used as GPIO pins, they must return to the high state whenever the device enters reset. This can be controlled by logic driven from rstoutn. After the device exits reset (indicated by rstoutn rising), these can return to GPIO mode. 4.4.21 Keyboard controller (KBD) NOTE For more information, see Keyboard Controller section of the device TRM. Table 4-24. Keyboard Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL kbd_row0 Keypad row 0 I AD9/ E1 kbd_row1 Keypad row 1 I AF9/ G2 kbd_row2 Keypad row 2 I AG4/ G1 kbd_row3 Keypad row 3 I AG2/ G6 kbd_row4 Keypad row 4 I AG3/ F2 kbd_row5 Keypad row 5 I AG5/ F3 kbd_row6 Keypad row 6 I AF2/ D1 kbd_row7 Keypad row 7 I AF6/ F6 kbd_row8 Keypad row 8 I AF3/ C2 kbd_col0 Keypad column 0 O AF4/ E2 kbd_col1 Keypad column 1 O AF1/ D2 kbd_col2 Keypad column 2 O AE3/ F4 kbd_col3 Keypad column 3 O AE5/ C1 kbd_col4 Keypad column 4 O AE1/ E4 kbd_col5 Keypad column 5 O AE2/ F5 kbd_col6 Keypad column 6 O AE6/ E6 kbd_col7 Keypad column 7 O AD2/ D3 kbd_col8 Keypad column 8 O AD3/ D5 4.4.22 Pulse Width Modulation (PWM) Interface NOTE For more information, see the Pulse-Width Modulation (PWM) SS section of the device TRM. Table 4-25. PWM Signal Descriptions SIGNAL NAME DESCRIPTION TYPE BALL PWMSS1 eQEP1A_in EQEP1 Quadrature Input A I E1 / AD9 eQEP1B_in EQEP1 Quadrature Input B I G2 / AF9 eQEP1_index EQEP1 Index Input IO AE9 / H7 eQEP1_strobe EQEP1 Strobe Input IO G1 / AF8 ehrpwm1A EHRPWM1 Output A O AE8 / G6 ehrpwm1B EHRPWM1 Output B O AD8 / F2 ehrpwm1_tripzone_in put EHRPWM1 Trip Zone Input IO AG7 / F3 eCAP1_in_PWM1_out ECAP1 Capture Input / PWM Output IO AH6 / D1 ehrpwm1_synci EHRPWM1 Sync Input I AH3 / E2 ehrpwm1_synco EHRPWM1 Sync Output O AH5 / D2 |
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