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DRA752ABC Datasheet(PDF) 132 Page - Texas Instruments

Part # DRA752ABC
Description  DRA75x, DRA74x Infotainment Applications Processor Silicon Revision 2.0
PDF  443 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

DRA752ABC Datasheet(HTML) 132 Page - Texas Instruments

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DRA756, DRA755, DRA754, DRA752
DRA751, DRA750, DRA746, DRA745, DRA744
SPRS950F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: DRA756 DRA755 DRA754 DRA752 DRA751 DRA750 DRA746 DRA745 DRA744
Terminal Configuration and Functions
Copyright © 2015–2019, Texas Instruments Incorporated
Table 4-25. PWM Signal Descriptions (continued)
SIGNAL NAME
DESCRIPTION
TYPE
BALL
PWMSS2
eQEP2A_in
EQEP2 Quadrature Input A
I
AG6 / F4
eQEP2B_in
EQEP2 Quadrature Input B
I
AH4 / C1
eQEP2_index
EQEP2 Index Input
IO
AG4 / E4
eQEP2_strobe
EQEP2 Strobe Input
IO
AG2 / F5
ehrpwm2A
EHRPWM2 Output A
O
AC5 / E6
ehrpwm2B
EHRPWM2 Output B
O
AB4 / D3
ehrpwm2_tripzone_in
put
EHRPWM2 Trip Zone Input
IO
AD4 / F6
eCAP2_in_PWM2_out ECAP2 Capture Input / PWM Output
IO
AC4 / D5
PWMSS3
eQEP3A_in
EQEP3 Quadrature Input A
I
AC7 / C2
eQEP3B_in
EQEP3 Quadrature Input B
I
AC6 / C3
eQEP3_index
EQEP3 Index Input
IO
AC9 / C4
eQEP3_strobe
EQEP3 Strobe Input
IO
AC3 / B2
ehrpwm3A
EHRPWM3 Output A
O
AC8 / D6
ehrpwm3B
EHRPWM3 Output B
O
AD6 / C5
ehrpwm3_tripzone_in
put
EHRPWM3 Trip Zone Input
IO
AB8 / A3
eCAP3_in_PWM3_out ECAP3 Capture Input / PWM Output
IO
AB5 / B3
4.4.23 Audio Tracking Logic (ATL)
NOTE
For more information, see the Audio Tracking Logic (ATL) section of the device TRM.
Table 4-26. ATL Signal Descriptions
SIGNAL NAME
DESCRIPTION
TYPE
BALL
atl_clk0
Audio Tracking Logic Clock 0
O
D18
atl_clk1
Audio Tracking Logic Clock 1
O
E17
atl_clk2
Audio Tracking Logic Clock 2
O
B26
atl_clk3
Audio Tracking Logic Clock 3
O
C23
4.4.24 Test Interfaces
CAUTION
The I/O timings provided in Section 7, Timing Requirements and Switching
Characteristics are valid only if signals within a single IOSET are used. The
IOSETs are defined in the Table 7-151.
NOTE
For more information, see the On-Chip Debug Support / Debug Ports section of the device
TRM.



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