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L6711 Datasheet(PDF) 22 Page - STMicroelectronics |
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L6711 Datasheet(HTML) 22 Page - STMicroelectronics |
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22 / 50 page ![]() DAC Selection L6711 22/50 8 DAC Selection The device embeds a selectable DAC that allows the output voltage to have a tolerance of ±0.5% (0.6% for Hammer DAC) recovering from offsets and manufacturing variations. The VID_SEL pin selects the DAC table used to program the reference for the regulation as shown in Table . VID pins are inputs of an internal DAC that is realized by means of a series of resistors providing a partition of the internal voltage reference. The VID code drives a multiplexer that selects a voltage on a precise point of the divider. The DAC output is delivered to an amplifier obtaining the voltage reference (i.e. the set-point of the error amplifier, VPROG). Internal pull-ups are provided (realized with a 5 µA current generator up to 3V Typ); in this way, to program a logic "1" it is enough to leave the pin floating, while to program a logic "0" it is enough to short the pin to SGND. Programming the "11111x" code (NOCPU, VID5 is irrelevant), the device shuts down: all mosfets are turned OFF and SS_END is shorted to SGND. Removing the code causes the device to restart. The voltage identification (VID) pin configuration also sets the Over / Under Voltage protection (OVP/UVP) thresholds. Table 7. DAC Selection VID_SEL Selected DAC OPEN VRM / VRD 10.x DAC. Output voltage ranges from 0.8185V to 1.5810V with 12.5mV steps (See Table 5). Since the VIDx pins program the maximum output voltage, according to VRD 10.x specs, the device automatically regulates with –19mV offset avoiding use of any external component to lower the regulated voltage. Since the -19mV offset is programmed during the production stage, no further error is introduced to generate the offset since it is automatically recovered during the trimming stage. SGND VID5 Hammer DAC OPEN Output voltage ranges from 0.800V to 1.550V with 25mV steps (See Table 6). SGND Output voltage ranges from 0.825V to 1.575V with 25mV steps (See Table 6). Since the +25mV offset is programmed during the production stage, no further error is introduced to generate the offset since it is automatically recovered during the trimming stage. |
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