PCA2125TS datasheet(34/40 Pages) NXP

34 / 40 page

PCA2125_00

Preliminary data sheet

Rev. 00.11 — 30 January 2007

34 of 40

NXP Semiconductors

PCA2125

SPI Real time clock / calendar

11. Package outline

Fig 23. Package outline SOT402-1

UNIT

cD (1)

E (2)

(1)

eHE

LLp

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

0.65

6.6

6.2

0.4

0.3

0.72

0.38

0.13

0.1

0.2

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1

MO-153

99-12-27

03-02-18

w M

b p

0.25

L p

detail X

(A )

v M A

2.5

5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

max.

1.1

pin 1 index

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