TMS320DM647 datasheet(104/182 Pages) TI

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6.9.3.10 VREF Routing

DM648

Device

DDR2Device

VREFNominalMinimum

TraceWidthis20Mils

VREFBypassCapacitor

NeckdowntominimuminBGA escape

regionsisacceptable.Narrowingto

accomodateviacongestionforshort

distancesisalsoacceptable.Best

performanceisobtainedifthewidth

ofVREFismaximized.

6.9.3.11 DDR2 CK and ADDR_CTRL Routing

DM648

TMS320DM647/TMS320DM648

Digital Media Processor

SPRS372B – MAY 2007 – REVISED APRIL 2008

www.ti.com

VREF is used as a reference by the input buffers of the DDR2 memories as well as the DM647’s. VREF is

intended to be 1/2 the DDR2 power supply voltage and should be created using a resistive divider as

shown in Figure 6-12. Other methods of creating VREF are not recommended. Figure 6-16 shows the

layout guidelines for VREF.

Figure 6-16. VREF Routing and Topology

Figure 6-17 shows the topology of the routing for the CK and ADDR_CTRL net classes. The route is a

balanced T as it is intended that the length of segments B and C be equal. In addition, the length of A

should be maximized.

Figure 6-17. CK and ADDR_CTRL Routing and Topology

Peripheral Information and Electrical Specifications

104

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