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LAN9312 Datasheet(PDF) 268 Page - SMSC Corporation |
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LAN9312 Datasheet(HTML) 268 Page - SMSC Corporation |
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268 / 458 page  High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface Datasheet Revision 1.2 (04-08-08) 268 SMSC LAN9312 DATASHEET 14.2.9.7 Free Running 25MHz Counter Register (FREE_RUN) This read-only register reflects the current value of the free-running 25MHz counter. Refer to Section 12.2, "Free-Running Clock," on page 161 for additional information. Offset: 09Ch Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31:0 Free Running Counter (FR_CNT) This field reflects the current value of the free-running 32-bit counter. At reset, the counter starts at zero and is incremented by one every 25MHz cycle. When the maximum count has been reached, the counter will rollover to zero and continue counting. Note: The free running counter can take up to 160nS to clear after a reset event. RO 00000000h |
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