DIO1411

Version 1.0, Jul 2024

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18

The consecutive alert bits CTHRM[2:0] are decoded as shown in the following table. The default setting

is 4 consecutive out of limit measurements.

3:1

CALRT

[2:0]

Determines the number of consecutive temperature measurements that must meet an out of limit

condition before the

———

ALERT pin is asserted. The consecutive alert bits CALRT[2:0] are decoded as

shown in the following table. The default setting is 1 consecutive out of limit measurements.

0

Reserved

Do not use.

Consecutive alert/Therm settings

2

1

0

Number of consecutive out of limit

measurements

0

0

0

1 (default for CALRT [2:0])

0

0

1

2

0

1

1

3

1

1

1

4 (default for CTHRM [2:0])

0

1

0

4

1

0

0

1

0

1

1

1

0

12.11. High Limit status register

In the interrupt mode, the High Limit status register indicates if the measured temperature exceeds the High

Limit for the programmed number of times in a consecutive measurements. Reading from the High Limit status

register will clear all bits. And the HIGH status bit in the status register will also be cleared.

In the comparator mode, the High Limit status register indicates if the measured temperature exceeds the High

Limit for the programmed number of times in a consecutive measurements. Once the High Limit status bit is set,

it will remain set until the measured temperature drops below the High Limit minus the Therm Hysteresis.

Reading from the High Limit status register will not clear all bits.

In both interrupt mode and comparator mode, the HIGH status bit in the status register will be set if the High

Limit status bit is set. The HIGH status bit in the status register will be cleared when High Limit status bit is

cleared.

Addr.

Type

Register

B7

B6

B5

B4

B3

B2

B1

B0

Default

35h

R-C

High Limit

status

Reserved

IHIGH

00h

Note: R-C = Read then Clear.