AS1181 datasheet(68/92 Pages) AMSOSRAM

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AS1181

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DS001139 • v3-00 • 2026-Apr-01

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8.3.25

PWM_CTR register (Address 0x1A32)

Table 37: PWM_CTR register (Write Access when config_mode ==1)

Addr: 0x1A32

PWM_CTR

Bit

Bit field

Default

Access

Bit description

pwm_illum_enable

OTP

LED illumination duration is controlled by STROBE_PWM1

input used as PWM source.

Note:

If enabled td_illum shows sampled illumination duration safety

trigger signal test is forced to be disabled if this bit is high

safety illumination max test is forced to be disabled if

STROBE input is high for more than 32768 µs if this bit is high

7:4

pwm_grp_split

OTP

Enable ID2_PWM2 as the secondary input and select for

PWM into two groups.

Note:

If set > 0, indicates channel number starting from which

illumination is controlled by ID2 input i.e., if set to 4, channels

0-3 illumination duration is controlled by STROBE input,

channels 4-7 is controlled by ID2/STROBE_AUX input if set to

0, all channels illumination duration is controlled by STROBE

input.

9:8

pwm_trig

OTP

Trigger control for the mode with ID2 as auxiliary strobe input

defines how illumination sequence for both main (STROBE)

and auxiliary (ID2) channels group is triggered.

0: – Default, STROBE or ID2, illumination is triggered by the

first coming edge either ID2 or STROBE signal

1: – STROBE and ID2, illumination is triggered in the moment

both STROBE and ID2 become high

2: – STROBE only, illumination for both groups is triggered

only by the STROBE signal rising edge

3: – ID2 only, illumination for both groups is triggered only by

the ID2 signal rising edge

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