TMUX7201 datasheet(26/43 Pages) TI2

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7.3.7 Ultra-Low Charge Injection

Figure 7-1 shows how the TMUX720x devices have a transmission gate topology. Any mismatch in the stray

capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is

opened or closed.

GDP

GDN

GSN

GSP

OFF

OFF ON

Figure 7-1. Transmission Gate Topology

The TMUX720x contains specialized architecture to reduce charge injection on the Drain (Dx). To further reduce

charge injection in a sensitive application, a compensation capacitor (Cp) can be added on the Source (S).

By design, the excess charge from the switch transition will be pushed into the compensation capacitor on

the Source (S) instead of the Drain (D). As a general rule, Cp should be 20x larger than the equivalent load

capacitance on the Drain (D). Figure 7-2 shows charge injection variation with different compensation capacitors

on the Source side. This plot was captured on the TMUX7219 as part of the TMUX72xx family with a 100pF load

capacitance.

Figure 7-2. Charge Injection Compensation

TMUX7201, TMUX7202

SCDS443C – OCTOBER 2022 – REVISED OCTOBER 2024

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TMUX7201 Datasheet(PDF) 26 Page - Texas Instruments