Specifications ispLSI 3192

11

Dedicated Clock inputs. These clock inputs are connected to one of the

clock inputs of all the I/O cells in the device.

Dedicated Clock inputs. These clock inputs are connected to one of the

clock inputs of all the GLBs on the device.

Active Low (0) Reset pin which resets all of the GLB and I/O registers in

the device.

Input — Dedicated in-system programming enable input pin. When this

pin is high, the BSCAN TAP controller pins TMS, TDI, TDO and TCK

are enabled. When this pin is brought low, the ISP state machine

control pins MODE, SDI, SDO and SLCK are enabled. High-to-low

transition of this pin will put the device in the programming mode and

put all I/O pins in high-Z state.

Input - This pin performs two functions. It is the Test Data input pin

when ispEN is logic high. When ispEN is logic low, it functions as an

input pin to load programming data into the device. SDI is also used as

one of the two control pins for the isp state machine.

Input/Output Pins - These are the general purpose I/O pins used by the

logic array.

NAME

Table 2 - 0002/3192

PQFP PIN NUMBERS

DESCRIPTION

36,

43,

50,

57,

64,

71,

78,

85,

92,

99,

106,

113,

120,

127,

134,

141,

156,

163,

170,

177,

184,

191,

198,

205,

212,

219,

226,

233,

240,

7,

14,

21,

37,

44,

51,

58,

65,

72,

79,

86,

93,

100,

107,

114,

121,

128,

135,

142,

157,

164,

171,

178,

185,

192,

199,

206,

213,

220,

227,

234,

1,

8,

15,

22,

38,

45,

52,

59,

66,

73,

80,

87,

94,

101,

108,

115,

122,

129,

136,

143,

158,

165,

172,

179,

186,

193,

200,

207,

214,

221,

228,

235,

2,

9,

16,

23,

I/O 0 - I/O 5

I/O 6 - I/O 11

I/O 12 - I/O 17

I/O 18 - I/O 23

I/O 24 - I/O 29

I/O 30 - I/O 35

I/O 36 - I/O 41

I/O 42 - I/O 47

I/O 48 - I/O 53

I/O 54 - I/O 59

I/O 60 - I/O 65

I/O 66 - I/O 71

I/O 72 - I/O 77

I/O 78 - I/O 83

I/O 84 - I/O 89

I/O 90 - I/O 95

I/O 96 - I/O 101

I/O 102 - I/O 107

I/O 108 - I/O 113

I/O 114 - I/O 119

I/O 120 - I/O 125

I/O 126 - I/O 131

I/O 132 - I/O 137

I/O 138 - I/O 143

I/O 144 - I/O 149

I/O 150 - I/O 155

I/O 156 - I/O 161

I/O 162 - I/O 167

I/O 168 - I/O 173

I/O 174 - I/O 179

I/O 180 - I/O 185

I/O 186 - I/O 191

39,

46,

53,

60,

67,

74,

81,

88,

95,

102,

109,

116,

123,

130,

137,

144,

159,

166,

173,

180,

187,

194,

201,

208,

215,

222,

229,

236,

3,

10,

17,

24,

40,

47,

54,

61,

68,

75,

82,

89,

96,

103,

110,

117,

124,

131,

138,

145,

160,

167,

174,

181,

188,

195,

202,

209,

216,

223,

230,

237,

4,

11,

18,

25,

41,

48,

55,

62,

69,

76,

83,

90,

97,

104,

111,

118,

125,

132,

139,

146,

161,

168,

175,

182,

189,

196,

203,

210,

217,

224,

231,

238,

5,

12,

19,

26

Global Output Enable input pins.

152 and 153

GOE0 and GOE1

33

RESET

35, 34, 148

Y0, Y1 and Y2

149, 151

Y3 and Y4

32

BSCAN/ispEN2

30

TDI/SDI2

29

TCK/SCLK2

28

TMS/MODE2

155

TRST/NC1, 2

27

TDO/SDO2

147

No Connect

1. NC pins are not to be connected to any active signal, Vcc or GND.

2. Pins have dual function capability.

NC1

Output - This pin performs two functions. When ispEN is logic low, it

functions as the pin to read the isp data. When ispEN is high it functions

as Test Data Out.

Input - Test Reset, active low to reset the Boundary Scan State

Machine.

Input - This pin performs two functions. It is the Test Mode Select input

pin when ispEN is logic high. When ispEN is logic low, it functions as

pin to control the operation of the isp state machine.

Input - This pin performs two functions. It is the Test Clock input pin

when ispEN is logic high. When ispEN is logic low, it functions as a

clock pin for the Serial Shift Register.

Test output enable pin. TOE tristates all I/O pins when a logic low

is driven.

154

TOE

Ground (GND)

13,

105,

197,

31,

119,

211,

49,

133,

225,

GND

63,

150,

239

77,

169,

91,

183,

84,

176,

V

6,

98,

190,

20,

112,

204,

42,

126,

218,

VCC

56,

140,

232

70,

162,

CC

Pin Description