BU21180FS datasheet(19/43 Pages) ROHM

19 / 43 page

19/40

www.rohm.com

TSZ22111

• 15 • 001

BU21180FS

TSZ02201-0L5L0F300930-1-2

06.Aug.2018 Rev.002

0x40-0x42: Interrupt Factor

Name:

INTERRUPT

Address:

0x40-0x42

Description:

These registers show the interrupt factor. The INTB pin outputs low level when the logical disjunction

(hereinafter, referred to as

“OR”) of the register address 0x40-0x42 becomes to 1, and outputs HIZ when the

result becomes 0. In the case the bit "MLT_SW_EN" in the register "Control Mode" is set to 0, while the OR

of the register address 0x41 is 1, the other switch operations are not detected. After the OR becomes 0, the

next switch operation is detectable.

0: Interrupt is undetected

1: Interrupt is detected

INT_FININI

: Initialization Completion Interrupt

When the initialization of MPU is completed, this bit is set to 1. This bit is cleared by setting 0 to the bit

“CLR_INT_FININI” in the register “Clear Interrupt Factor”.

INT_FINCAL

: Software Calibration Completion Interrupt

When software calibration is completed, this bit is set to 1. This bit is cleared by setting 0 to the bit

“CLR_INT_FINCAL” in the register “Clear Interrupt Factor”.

INT_FALCAL

: Calibration Failure Interrupt

When software calibration is failed, this bit is set to 1. This bit is cleared by setting 0 to the bit

“CLR_INT_FALCAL” in the register “Clear Interrupt Factor”.

INT_UNK

: Unexpected Long Press Detection Interrupt

When unexpected long press is detected, this bit is set to 1. The bit is set to 1 when the OR of the

“Unexpected Long Press Detection” is 1. This bit is cleared by setting 0 to the register “Clear

Unexpected Long Press Detection

”.

INT_NOISE

: Noise Detection Interrupt

When the sensors detect the noise, this bit is set to 1. This bit is cleared by setting 0 to the bit

“CLR_INT_NOISE” in the register “Clear Interrupt Factor”.

INT_SW_ON

: Switch ON Detection Interrupt

When the OR of the register

“Switch ON Detection” is 1, this bit is set to 1. This bit is cleared by setting 0

to the register

“Clear Switch ON Detection”.

INT_SW_OFF

: Switch OFF Detection Interrupt

When the OR of the register

“Switch OFF Detection” is 1, this bit is set to 1. This bit is cleared by setting

0 to the register

“Clear Switch OFF Detection”.

INT_HLD

: Switch Long Press Detection Interrupt

When the OR of the register

“Switch Long Press Detection” is 1, this bit is set to 1. This bit is cleared by

setting 0 to the register

“Clear Switch Long Press Detection”.

INT_HLDRPT

: Switch Repeated Long Press Detection Interrupt

When the OR of the register

“Switch Repeated Long Press Detection” is 1, this bit is set to 1. This bit is

cleared by setting 0 to the register

“Clear Switch Repeated Long Press Detection”.

INT_MULT_ON : Multiple Pattern Switches ON Detection Interrupt

When the OR of the register

“Multiple Pattern Switches ON Detection” is 1, this bit is set to 1. This bit is

cleared by setting 0 to the register

“Clear Multiple Pattern Switches ON Detection”.

INT_MULT_OFF: Multiple Pattern Switches OFF Detection Interrupt

When the OR of the register

“Multiple Pattern Switches OFF Detection” is 1, this bit is set to 1. This bit is

cleared by setting 0 to the register

“Clear Multiple Pattern Switches OFF Detection”.

INT_AVDDON

: AVDD ON Detection Interrupt

When AVDD voltage outputs, this bit is set to 1. This bit is cleared by setting 0 to the bit

“CLR_INT_AVDDON” in the register “Clear Interrupt Factor”. This function is not for failure diagnosis of

AVDD.

INT_AVDDOFF : AVDD OFF Detection Interrupt

When AVDD voltage does not output, this bit is set to 1. This bit is cleared by setting 0 to the bit

“CLR_INT_AVDDOFF” in the register “Clear Interrupt Factor”. This function is not for failure diagnosis of

AVDD.

Address

R/W

Initial

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x40

0x01

INT_

NOISE

INT_UNK

INT_

FALCAL

INT_

FINCAL

INT_

FININI

0x41

0x00

INT_MULT

_OFF

INT_MULT

_ON

INT_

HLDRPT

INT_HLD

INT_

SW_OFF

INT_

SW_ON

0x42

0x00

INT_

AVDDOFF

INT_

AVDDON

BU21180FS Datasheet(PDF) 19 Page - Rohm

BU21180FS Datasheet(HTML) 19 Page - Rohm

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

Datasheet Download

Link URL