XMEGAA datasheet(75/375 Pages) ATMEL

75 / 375 page

8077B–AVR–06/08

XMEGA A

7.9

7.9.1

CTRL - System Clock Control Register

• Bit 7:3 - Res: Reserved

These bits are unused and reserved for future use. For compatibility with future devices, always

write these bits to zero when this register is written.

• Bit 2:0 - SCLKSEL[2:0]: System Clock Selection

SCLKSEL is used to select the source for the System Clock. See Table 7-1 for the different

selections. Changing the system clock source will take 2 clock cycles on the old clock source

and 2 clock cycles on the new clock source. These bits are protected by the Configuration

Change Protection mechanism, for details refer to ”Configuration Change Protection” on page

12.

SCLKSEL cannot be changed if the new source is not stable.

7.9.2

PSCTRL - System Clock Prescaler Register

• Bit 7 - Res: Reserved

This bit is reserved and will always be read as zero. For compatibility with future devices, always

write this bit to zero when this register is written.

Bit

76543210

+0x00

-----

SCLKSEL[2:0]

CTRL

Read/Write

RRRRR

R/W

Initial Value

00000000

Table 7-1.

System Clock Selection

SCLKSEL[2:0]

Group Configuration

Description

000

RC2MHz

2 MHz Internal RC Oscillator

001

RC32MHz

32 MHz Internal RC Oscillator

010

RC32KHz

32 kHz Internal RC Oscillator

011

XOSC

External Oscillator or Clock

100

PLL

Phase Locked Loop

101

Reserved

110

Reserved

111

Reserved

Bit

765

432

+0x01

PSADIV[4:0]

PSBCDIV

PSCTRL

Read/Write

R/W

Initial Value

000

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