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HT80C51 Datasheet(PDF) 111 Page - List of Unclassifed Manufacturers

Part # HT80C51
Description  User Manual Document Information
PDF  132 Pages
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HT80C51 Datasheet(HTML) 111 Page - List of Unclassifed Manufacturers

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HT80C51 User Manual
80C51 Family Instruction Set – Instruction definitions
Handshake Solutions
© Philips Electronics N.V. 2005
Page 111 of 132
LJMP addr16
Function: Long Jump
Description: LJMP causes an unconditional branch to the indicated address, by loading the high-order and
low-order bytes of the PC (respectively) with the second and third instruction bytes. The destina-
tion may therefore be anywhere in the full 64k program memory address space. No flags are af-
fected.
Example: The label “JMPADR” is assigned to the instruction at program memory location 1234H. The in-
struction,
LJMP JMPADR
at location 0123H will load the program counter with 1234H.
Bytes: 3
Cycles: 2
Encoding:
Operation: LJMP
(PC)
← addr15-0
MOV <dest-byte>,<src-byte>
Function: Move byte variable
Description: The byte variable indicated by the second operand is copied into the location specified by the first
operand. The source byte is not affected. No other register or flag is affected.
This is by far the most flexible operation. Fifteen combinations of source and destination address-
ing modes are allowed.
Example: Internal RAM location 30H holds 40H. The value of RAM location 40H is 10H. The data present at
input port 1 is 11001010B (0CAH). The instruction sequence,
MOV R0,#30H
;R0 < = 30H
MOV A,@R0
;A < = 40H
MOV R1,A
;R1 < = 40H
MOV B,@R1
;B < = 10H
MOV @R1,P1
;RAM (40H) < = 0CAH
MOV P2,P1
;P2 #0CAH
leaves the value 30H in register 0, 40H in both the Accumulator and register 1, 10H in register B,
and 0CAH (11001010B) both in RAM location 40H and output on port 2.
MOV A,Rn
Bytes: 1
Cycles: 1
Encoding:
Operation: MOV
(A)
← (Rn)
0
0
0
0
0
0
1
0
addr15-addr8
addr7-addr0
1
1
1
0
1
r
r
r



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