HT80C51 datasheet(128/132 Pages) ETC2

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HT80C51 User Manual

80C51 Family Instruction Set – Instruction definitions

Page 128 of 132

XCHD A,@Ri

Function: Exchange Digit

Description: XCHD exchanges the low-order nibble of the Accumulator (bits 3-0), generally representing a

hexadecimal or BCD digit, with that of the internal RAM location indirectly addressed by the speci-

fied register. The high-order nibbles (bits 7-4) of each register are not affected. No flags are af-

fected.

Example: R0 contains the address 20H. The Accumulator holds the value 36H (00110110B). Internal RAM

location 20H holds the value 75H (01110101B). The instruction,

XCHD A,@R0

will leave RAM location 20H holding the value 76H (01110110B) and 35H (00110101B) in the Ac-

cumulator.

Bytes: 1

Cycles: 1

Encoding:

Operation: XCHD

(A3-0)

↔ ((Ri3-0))

XRL <dest-byte>,<src-byte>

Function: Logical Exclusive-OR for byte variables

Description: XRL performs the bitwise logical Exclusive-OR operation between the indicated variables, storing

the results in the destination. No flags are affected.

The two operands allow six addressing mode combinations. When the destination is the Accumu-

lator, the source can use register, direct, register-indirect, or immediate addressing; when the des-

tination is a direct address, the source can be the Accumulator or immediate data.

( Note: When this instruction is used to modify an output port, the value used as the original port

data will be read from the output data latch, not the input pins.)

Example: If the Accumulator holds 0C3H (11000011B) and register 0 holds 0AAH (10101010B) then the

instruction,

XRL A,R0

will leave the Accumulator holding the value 69H (01101001B).

When the destination is a directly addressed byte, this instruction can complement combinations

of bits in any RAM location or hardware register. The pattern of bits to be complemented is then

determined by a mask byte, either a constant contained in the instruction or a variable computed

in the Accumulator at run-time. The instruction,

XRL P1,#00110001B

will complement bits 5, 4, and 0 of output Port 1.

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