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AD7190 Datasheet(PDF) 19 Page - Analog Devices

Part # AD7190
Description  4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA
PDF  21 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7190 Datasheet(HTML) 19 Page - Analog Devices

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Preliminary Technical Data
AD7190
Rev.PrD 7/08 | Page 19
CONFIGURATION REGISTER
(RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x000117)
The configuration register is a 24-bit register from which data can be read or to which data can be written. This register is used to
configure the ADC for unipolar or bipolar mode, enable or disable the buffer, enable or disable the burnout currents, select the gain,
and select the analog input channel.
Table 18 outlines the bit designations for the filter register. CON0 through CON23 indicate the bit locations. CON denotes that the bits
are in the configuration register. CON23 denotes the first bit of the data stream. The number in brackets indicates the power-on/reset
default status of that bit.
CON23
CON22
CON21
CON20
CON19
CON18
CON17
CON16
CHOP(0)
0(0)
0(0)
REFSEL(0)
0(0)
0(0)
0(0)
(0)
CON15
CON14
CON13
CON12
CON11
CON10
CON9
CON8
CH7(0)
CH6(0)
CH5(0)
CH4(0)
CH3(0)
CH2(0)
CH1(0)
CH0(1)
CON7
CON6
CON5
CON4
CON3
CON2
CON1
CON0
BURN(0)
REFDET(0)
0(0)
BUF(1)
U/B (0)
GN2(1)
GN1(1)
GN0(1)
Table 18. Configuration Register Bit Designations
Bit
Location
Bit Name
Description
CON23
CHOP
Chop Enable Bit.
When CHOP is cleared, chop is disabled.
When CHOP is set, chop is disabled.
When chop is enabled, the offset and offset drift is continuously removed by the ADC. However, it
increases the conversion time and settling time of the ADC. For example, when FS = 96 decimal and the
sinc4 filter is selected, the conversion time with chop enabled equals 80 ms and the settling time equals
160 ms. With chop disabled, higher conversion rates are allowed. For an SF word of 96 decimal and the
sinc4 filter selected, the conversion time is 20 ms and the settling time is 80 ms. However, at low gains,
periodic calibrations may be required to remove the offset and offset drift.
CON22,
CON21
0
These bits must be programmed with a Logic 0 for correct operation.
CON20
REFSEL
Reference Select Bits. The reference source for the ADC is selected using these bits.
REFSEL
Reference Voltage
0
External reference applied between REFIN1(+) and REFIN1(
−)
1
External reference applied between the P1 and P0 pins.
CON19 to
CON16
0
These bits must be programmed with a Logic 0 for correct operation.
CON15 to
CON8
CH7 to CH0
Channel Select Bits.
These bits are used to select which channels are enabled on the AD7190. See Table 19. Several channels
can be selected and the AD7190 will automatically sequence between them. The conversion on each
channel will require the complete settling time.
CON7
BURN
When this bit is set to 1 by the user, the 500 nA current sources in the signal path are enabled. When
BURN = 0, the burnout currents are disabled. The burnout currents can be enabled only when the buffer
is active.
CON6
REFDET
Enables the Reference Detect Function.
When set, the NOXREF bit in the status register indicates when the external reference being used by the
ADC is open circuit or less than 0.5 V.
CON5
0
This bit must be programmed with a Logic 0 for correct operation.
CON4
BUF
Configures the ADC for buffered or unbuffered mode of operation. If cleared, the ADC operates in
unbuffered mode, lowering the power consumption of the device. If set, the ADC operates in buffered
mode, allowing the user to place source impedances on the front end without contributing gain errors
to the system.
With the buffer disabled, the voltage on the analog input pins can be from 50 mV below GND to 50 mV
above AVDD. When the buffer is enabled, it requires some headroom so the voltage on any input pin must
be limited to 200 mV within the power supply rails.



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