32C81 datasheet(23/85 Pages) RENESAS

23 / 85 page

page 23

3. Memory

Figure 3.1 shows a memory map of the M32C/81 group.

M32C/81 provides 16-Mbyte address space from addresses 00000016 to FFFFFF16.

The internal ROM is allocated in lower addresses beginning with address FFFFFF16. For example, a 64-

Kbyte internal ROM is allocated in addresses FF000016 to FFFFFF16.

The fixed interrupt vectors are allocated in addresses FFFFDC16 to FFFFFF16. It stores the starting ad-

dress of each interrupt routine.

The internal RAM is allocated in higher addresses beginning with address 00040016. For example, a 10-

Kbyte internal RAM is allocated in addresses 00040016 to 002BFF16. Besides storing data, it becomes

stacks when the subroutine is called or an interrupt is acknowleged.

The SFR is allocated in addresses 00000016 to 0003FF16. The control registers for peripheral functions

such as I/O port, A/D conversion, serial I/O, timer are allocated here. All addresses, which have nothing

allocated within the SFR, are reserved space and cannot be accessed by users.

The special page vectors are allocated in addresses FFFE0016 to FFFFDB16. It is used for the JMPS

instruction and JSRS instruction. Refer to the Renesas publication Software Manual for details.

In memory expansion mode and microprocessor mode, some space are reserved and cannot be accessed

by users.

SFR

Internal RAM

Reserved space(1)

External space

BRK instruction

Overflow

Undefined instruction

FFFFFF16

NMI

Type number

Address

YYYYYY16

M30810MC-XXXFP/GP

M30812MC-XXXGP

M3081LMC-XXXFP/GP

M3081NMC-XXXGP

Address

XXXXXX16

00000016

00040016

XXXXXX16

00800016

F0000016

YYYYYY16

FFFFFF16

002BFF16

0033FF16

FE000016

Reserved space(2)

Internal RAM

Special page

vector table

Address match

Watchdog timer

Reset

NOTES:

1. In memory expansion and microprocessor modes

2. In memory expansion mode

FFFFDC16

FFFE0016

Figure 3.1 Memory Map

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