M3882 datasheet(56/62 Pages) RENESAS

56 / 62 page

Rev.1.01

Nov 14, 2005

page 56 of 60

REJ03B0089-0101

3882 Group

Table 18 Timing requirements

(VCC = 3.3 V ± 0.3V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)

Reset input “L” pulse width

Main clock input cycle time

Main clock input “H” pulse width

Main clock input “L” pulse width

CNTR0, CNTR1 input cycle time

CNTR0, CNTR1 input “H” pulse width

CNTR0, CNTR1 input “L” pulse width

INT0, INT1, INT20, INT30, INT40, INT21, INT31, INT41

input “H” pulse width

INT0, INT1, INT20, INT30, INT40, INT21, INT31, INT41

input “L” pulse width

tW(RESET)

tC(XIN)

tWH(XIN)

tWL(XIN)

tC(CNTR)

tWH(CNTR)

tWL(CNTR)

Limits

tc(XIN)

Parameter

Min.

125

200

Typ.

Max.

Symbol

Unit

Table 19 Switching characteristics

(VCC = 3.3 V ± 0.3V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)

CMOS output rising time (Note 1)

CMOS output falling time (Note 1)

tr (CMOS)

tf (CMOS)

Limits

Parameter

Min.

Typ.

Max.

Symbol

Unit

Notes 1: The XOUT pin is excluded.

Test

conditions

Fig. 46

tWH(INT)

tWL(INT)

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