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M3882 Datasheet(PDF) 19 Page - Renesas Technology Corp |
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M3882 Datasheet(HTML) 19 Page - Renesas Technology Corp |
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19 / 62 page ![]() Rev.1.01 Nov 14, 2005 page 19 of 60 REJ03B0089-0101 3882 Group Fig. 14 Structure of port I/O related registers (2) Port P5 input register b7 b0 Port control register 3 P50 input level bit P51 input level bit P52 input level bit P53 input level bit These bits directly show the pin input levels. 0: “L” level input 1: “H” level input Not used (returns “0” when read) b7 b0 (P5I: address 0FF816) (PCTL3: address 0FF916) P50 open drain selection bit P51 open drain selection bit P52 open drain selection bit P53 open drain selection bit 0: CMOS 1: N-channel open drain Not used (returns “0” when read) |
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