3820 datasheet(11/67 Pages) RENESAS

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MITSUBISHI MICROCOMPUTERS

3820 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

FUNCTIONAL DESCRIPTION

Central Processing Unit (CPU)

The 3820 group uses the standard 740 family instruction set. Re-

fer to the table of 740 family addressing modes and machine in-

structions or the SERIES 740 <Software> User’s Manual for de-

tails on the instruction set.

Machine-resident 740 family instructions are as follows:

The FST and SLW instruction cannot be used.

The STP, WIT, MUL, and DIV instruction can be used.

CPU Mode Register

The CPU mode register is allocated at address 003B16.

The CPU mode register contains the stack page selection bit and

the internal system clock selection bit.

Fig. 1 Structure of CPU mode register

CPU mode register

(CPUM (CM) : address 003B16)

Not available

Processor mode bits

b1 b0

0 : Single-chip mode

1 :

0 :

1 :

Stack page selection bit

0 : 0 RAM in the zero page is used as stack area

1 : 1 RAM in page 1 is used as stack area

Not used (returns “1” when read)

(Do not write “0” to this bit)

Port XC switch bit

0 : I/O port

1 : XCIN, XCOUT

Main clock ( X IN–XOUT) stop bit

0 : Oscillating

1 : Stopped

Main clock division ratio selection bit

0 : f(XIN)/2 (high-speed mode)

1 : f(XIN)/8 (middle-speed mode)

Internal system clock selection bit

0 : XIN-XOUT selected (middle-/high-speed mode)

1 : XCIN-XCOUT selected (low-speed mode)

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