3820 datasheet(29/67 Pages) RENESAS

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MITSUBISHI MICROCOMPUTERS

3820 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Transmit buffer empty flag (TBE)

0: Buffer full

1: Buffer empty

Receive buffer full flag (RBF)

0: Buffer empty

1: Buffer full

Transmit shift register shift completion flag (TSC)

0: Transmit shift in progress

1: Transmit shift completed

Overrun error flag (OE)

0: No error

1: Overrun error

Parity error flag (PE)

0: No error

1: Parity error

Framing error flag (FE)

0: No error

1: Framing error

Summing error flag (SE)

0: OE U PE U FE =0

1: OE U PE U FE =1

Not used (returns “1” when read)

Serial I/O1 status register

(SIO1STS : address 0019 16)

Serial I/O1 control register

(SIO1CON : address 001A 16)

BRG count source selection bit (CSS)

0: f(XIN)

1: f(XIN)/4

Serial I/O1 synchronization clock selection bit (SCS)

•In clock synchronous mode

0 : BRG output/4

1 : External clock input

•In UART mode

0 : BRG output/16

1 : External clock input/16

SRDY1 output enable bit (SRDY)

0: P47 SRDY1 pin operates as I/O port P47

1: P47 SRDY1 pin operates as signal output pin SRDY1

(SRDY1 signal indicates receive enable state)

Transmit interrupt source selection bit (TIC)

0: When transmit buffer has emptied

1: When transmit shift operation is completed

Transmit enable bit (TE)

0: Transmit disabled

1: Transmit enabled

Receive enable bit (RE)

0: Receive disabled

1: Receive enabled

Serial I/O1 mode selection bit (SIOM)

0: Clock asynchronous serial I/O1 (UART) mode

1: Clock synchronous serial I/O1 mode

Serial I/O1 enable bit (SIOE)

0: Serial I/O1 disabled

(pins P44–P47 operate as I/O pins)

1: Serial I/O1 enabled

(pins P44–P47 operate as serial I/O1 pins)

UART control register

(UARTCON : address 001B 16)

Character length selection bit (CHAS)

0: 8 bits

1: 7 bits

Parity enable bit (PARE)

0: Parity checking disabled

1: Parity checking enabled

Parity selection bit (PARS)

0: Even parity

1: Odd parity

Stop bit length selection bit (STPS)

0: 1 stop bit

1: 2 stop bits

P45/TXD P-channel output disable bit (POFF)

0: CMOS output (in output mode)

1: N-channel open-drain output (in output mode)

Not used (return“1” when read)

Fig. 19 Structure of serial I/O1 control registers

3820 Datasheet(PDF) 29 Page - Renesas Technology Corp

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