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4502 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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4502 Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 116 page  4502 Group Rev.3.01 2005.02.02 page 7 of 112 REJ03B0105-0301 PORT BLOCK DIAGRAMS D0, D1, D4, D5 S RQ (Note 1) D2/C S RQ Skip decision (SZD instruction) (Note 1) PU22 S RQ K22 Pull-up transistor (Note 2) “L” level detection circuit D3/K S RQ PU23 D TQ A0 OKA instruction Register A IAK instruction K23 (Note 2) SD instruction Decoder Skip decision (SZD instruction) Register Y RD instruction CLD instruction Skip decision (SNZCP instruction) SD instruction RD instruction CLD instruction Decoder Register Y SCP instruction RCP instruction Key-on wakeup Skip decision (SZD instruction) (Note 1) Pull-up transistor “L” level detection circuit SD instruction RD instruction CLD instruction Decoder Register Y Key-on wakeup This symbol represents a parasitic diode on the port. 2: Applied potential to ports D2/C and D3/K must be VDD or less. Notes 1: Port block diagram (1) |
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