4508 datasheet(29/142 Pages) RENESAS

29 / 142 page

4508 Group

Rev.1.02

2006.12.22

page 29 of 140

REJ03B0148-0102

Table 10 Timer control registers

W21

PWM1 function invalid

PWM1 function valid

Stop (state retained)

Operating

Count source

PWM2 signal

Prescaler output (ORCLK)

CNTR1 input

On-chip oscillator clock (f(RING))

PWM1 function control bit

Timer 1 control bit

PWM2 function invalid

PWM2 function valid

Stop (state retained)

Operating

Count source

Timer 1 underflow signal (T1UDF)

Prescaler output (ORCLK)

CNTR0 input

System clock (STCK)

PWM2 function control bit

Timer 2 control bit

Timer 2 count source selection bits

W20

Timer control register W1

R/W

TAW1/TW1A

at reset : 00002

at RAM back-up : 00002

at reset : 00002

Timer control register W2

R/W

TAW2/TW2A

at RAM back-up : 00002

at reset : 00002

W23

W22

W21

W20

Stop (state initialized)

Operating

Prescaler control bit

Timer control register PA

TPAA

at RAM back-up : 02

at reset : 02

PA0

P12 (I/O) / CNTR0 (input)

P12 (input) /CNTR0 (I/O)

Count auto-stop circuit not selected

Count auto-stop circuit selected

Count start synchronous circuit not selected

Count start synchronous circuit selected

Falling edge

Rising edge

P12/CNTR0 pin function selection bit

Timer 1 count auto-stop circuit

selection bit (Note 2)

Timer 1 count start synchronous circuit

selection bit (Note 3)

CNTR0 pin input count edge selection bit

Timer control register W5

at RAM back-up : state retained

at reset : 00002

W53

W52

W51

W50

R/W

TAW5/TW5A

P11 (I/O) / CNTR1 (input)

P11 (input) /CNTR1 (I/O)

Output auto-control circuit not selected

Output auto-control circuit selected

INT pin input period count circuit not selected

INT pin input period count circuit selected

Falling edge

Rising edge

P11/CNTR1 pin function selection bit

CNTR 1 pin output auto-control circuit

selection bit

Timer 2

INT pin input period count circuit selection bit

CNTR1 pin input count edge selection bit

Timer control register W6

at RAM back-up : state retained

at reset : 00002

W63

W62

W61

W60

R/W

TAW6/TW6A

Notes 1: “R” represents read enabled, and “W” represents write enabled.

2: This function is valid only when the INT pin/timer 1 control is enabled (I10=“1”) and the timer 1 count start synchronous circuit is selected (W51=“1”).

3: This function is valid only when the INT pin/timer 1 control is enabled (I10=“1”).

W13

W12

W11

W10

W11

W10

Timer 1 count source selection bits

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