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4553 Datasheet(PDF) 19 Page - Renesas Technology Corp |
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4553 Datasheet(HTML) 19 Page - Renesas Technology Corp |
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19 / 145 page ![]() Rev.3.02 Dec 22, 2006 page 19 of 142 REJ03B0024-0302 4553 Group PROGRAM MEMORY (ROM) The program memory is a mask ROM. 1 word of ROM is composed of 10 bits. ROM is separated every 128 words by the unit of page (addresses 0 to 127). Table 1 shows the ROM size and pages. Fig- ure 10 shows the ROM map of M34553ED. Table 1 ROM size and pages Part number M34553M4 M34553M4H M34553M8 M34553M8H M34553G8 M34553G8H ROM (PROM) size (✕ 10 bits) 4096 words 8192 words Pages 32 (0 to 31) 64 (0 to 63) A part of page 1 (addresses 008016 to 00FF16) is reserved for in- terrupt addresses (Figure 11). When an interrupt occurs, the address (interrupt address) corresponding to each interrupt is set in the program counter, and the instruction at the interrupt address is executed. When using an interrupt service routine, write the in- struction generating the branch to that routine at an interrupt address. Page 2 (addresses 010016 to 017F16) is the special page for sub- routine calls. Subroutines written in this page can be called from any page with the 1-word instruction (BM). Subroutines extending from page 2 to another page can also be called with the BM in- struction when it starts on page 2. ROM pattern (bits 7 to 0) of all addresses can be used as data ar- eas with the TABP p instruction. Fig. 10 ROM map of M34553M8/M8H/G8/G8H Fig. 11 Page 1 (addresses 008016 to 00FF16) structure 9876543210 Interrupt address page 0000 008016 16 16 017F16 Subroutine special page 007F 00FF16 010016 1FFF16 018016 Page 1 Page 2 Page 0 Page 3 Page 63 90 8765 432 1 External 0 interrupt address 008016 008216 008416 Timer 1 interrupt address Timer 2 interrupt address 008616 008816 008A16 008C16 008E16 00FF16 Timer 3 interrupt address |
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