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4570 Datasheet(PDF) 33 Page - Renesas Technology Corp |
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4570 Datasheet(HTML) 33 Page - Renesas Technology Corp |
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33 / 69 page ![]() 32 MITSUBISHI MICROCOMPUTERS 4570 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER (4) Return signal An external wakeup signal is used to return from the RAM back-up mode because the oscillation is stopped. Table 14 shows the return condition for each return source. (5) Port P4 control registers • Key-on wakeup control register K0 Register K0 controls the port P4 key-on wakeup function. Set the contents of this register through register A with the TK0A instruction. In addition, the TAK0 instruction can be used to transfer the contents of register K0 to register A. • Pull-up control register PU0 Register PU0 controls the ON/OFF of the port P4 pull-up transistor. Set the contents of this register through register A with the TPU0A instruction. In addition, the TAPU0 instruction can be used to transfer the contents of register PU0 to register A. Table 14 Return source and return condition Remarks Port P0 shares the falling edge detection circuit with ports P1 and P4. Key-on wakeup functions of ports P0 and P1 are always valid. The key- on wakeup function valid/invalid of port P4 can be controlled with register K0. Set the port using the key-on wakeup function selected to “H” level before going into the RAM back-up mode. Select the return level (“L” level or “H” level) with the bit 2 of register I1 according to the external state before going into the RAM back-up mode. Return condition Return by an external falling edge input (“H” →“L”). Return by an external “H” level or “L” level input. The EXF0 flag is not set. Return source Ports P0, P1 and P4 P21/INT pin |
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