SH7261 datasheet(504/1348 Pages) RENESAS

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Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 472 of 1312

REJ09B0320-0200

(3)

Selecting Timing for Transfer from Buffer Registers to Timer General Registers in

Buffer Operation:

The timing for transfer from buffer registers to timer general registers can be selected in PWM

mode 1 or 2 for channel 0 or in PWM mode 1 for channels 3 and 4 by setting the buffer operation

transfer mode registers (TBTM_0, TBTM_3, and TBTM_4). Either compare match (initial

setting) or TCNT clearing can be selected for the transfer timing. TCNT clearing as transfer

timing is one of the following cases.

• When TCNT overflows (H'FFFF to H'0000)

• When H'0000 is written to TCNT during counting

• When TCNT is cleared to H'0000 under the condition specified in the CCLR2 to CCLR0 bits

in TCR

Note:

TBTM must be modified only while TCNT stops.

Figure 12.19 shows an operation example in which PWM mode 1 is designated for channel 0 and

buffer operation is designated for TGRA_0 and TGRC_0. The settings used in this example are

TCNT_0 clearing by compare match B, 1 output at compare match A, and 0 output at compare

match B. The TTSA bit in TBTM_0 is set to 1.

TCNT_0 value

H'0000

TGRA_0

Time

TIOCA

TGRC_0

H'0520

H'0450

H'0200

H'0520

H'0450

H'0200

TGRB_0

TGRA_0

Transfer

Figure 12.19 Example of Buffer Operation When TCNT_0 Clearing is Selected for

TGRC_0 to TGRA_0 Transfer Timing

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