SH7261 datasheet(529/1348 Pages) RENESAS

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Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 497 of 1312

REJ09B0320-0200

(2)

Outline of Complementary PWM Mode Operation

In complementary PWM mode, 6-phase PWM output is possible. Figure 12.39 illustrates counter

operation in complementary PWM mode, and figure 12.40 shows an example of complementary

PWM mode operation.

(a)

Counter Operation

In complementary PWM mode, three counters—TCNT_3, TCNT_4, and TCNTS—perform

up/down-count operations.

TCNT_3 is automatically initialized to the value set in TDDR when complementary PWM mode

is selected and the CST bit in TSTR is 0.

When the CST bit is set to 1, TCNT_3 counts up to the value set in TGRA_3, then switches to

down-counting when it matches TGRA_3. When the TCNT3 value matches TDDR, the counter

switches to up-counting, and the operation is repeated in this way.

TCNT_4 is initialized to H'0000.

When the CST bit is set to 1, TCNT_4 counts up in synchronization with TCNT_3, and switches

to down-counting when it matches TCDR. On reaching H'0000, TCNT4 switches to up-counting,

and the operation is repeated in this way.

TCNTS is a read-only counter. It need not be initialized.

When TCNT_3 matches TCDR during TCNT_3 and TCNT_4 up/down-counting, down-counting

is started, and when TCNTS matches TCDR, the operation switches to up-counting. When

TCNTS matches TGRA_3, it is cleared to H'0000.

When TCNT_4 matches TDDR during TCNT_3 and TCNT_4 down-counting, up-counting is

started, and when TCNTS matches TDDR, the operation switches to down-counting. When

TCNTS reaches H'0000, it is set with the value in TGRA_3.

TCNTS is compared with the compare register and temporary register in which the PWM duty is

set during the count operation only.

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