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SH7261 Datasheet(PDF) 546 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 546 Page - Renesas Technology Corp |
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546 / 1348 page  Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 514 of 1312 REJ09B0320-0200 (m) Counter Clearing by Another Channel In complementary PWM mode, by setting a mode for synchronization with another channel by means of the timer synchronous register (TSYR), and selecting synchronous clearing with bits CCLR2 to CCLR0 in the timer control register (TCR), it is possible to have TCNT_3, TCNT_4, and TCNTS cleared by another channel. Figure 12.55 illustrates the operation. Use of this function enables counter clearing and restarting to be performed by means of an external signal. TGRA_3 TCDR TDDR H'0000 Channel 1 Input capture A TCNT_1 TCNT_3 TCNT_4 TCNTS Synchronous counter clearing by channel 1 input capture A Figure 12.55 Counter Clearing Synchronized with Another Channel |
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