SH7261 datasheet(596/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)

Rev. 2.00 Sep. 07, 2007 Page 564 of 1312

REJ09B0320-0200

12.7.16

Overflow Flags in Reset Synchronous PWM Mode

When set to reset synchronous PWM mode, TCNT_3 and TCNT_4 start counting when the CST3

bit in TSTR is set to 1. At this point, TCNT_4's count clock source and count edge obey the

TCR_3 setting.

In reset synchronous PWM mode, with cycle register TGRA_3's set value at H'FFFF, when

specifying TGR3A compare-match for the counter clear source, TCNT_3 and TCNT_4 count up

to H'FFFF, then a compare-match occurs with TGRA_3, and TCNT_3 and TCNT_4 are both

cleared. At this point, TSR's overflow flag TCFV bit is not set.

Figure 12.122 shows a TCFV bit operation example in reset synchronous PWM mode with a set

value for cycle register TGRA_3 of H'FFFF, when a TGRA_3 compare-match has been specified

without synchronous setting for the counter clear source.

TGRA_3

(H'FFFF)

H'0000

TCFV_3

TCFV_4

TCNT_3 = TCNT_4

Counter cleared by compare match 3A

Not set

Figure 12.122 Reset Synchronous PWM Mode Overflow Flag

SH7261 Datasheet(PDF) 596 Page - Renesas Technology Corp