SH7261 datasheet(638/1348 Pages) RENESAS

638 / 1348 page

Section 13 8-Bit Timers (TMR)

Rev. 2.00 Sep. 07, 2007 Page 606 of 1312

REJ09B0320-0200

Bit

Bit Name

Initial

Value

R/W

Description

CMIEA

R/W

Compare Match Interrupt Enable A

Selects whether CMFA interrupt requests (CMIA) are

enabled or disabled when the CMFA flag in TCSR is

set to 1.

0: CMFA interrupt requests (CMIA) are disabled

1: CMFA interrupt requests (CMIA) are enabled

OVIE

R/W

Timer Overflow Interrupt Enable

Selects whether OVF interrupt requests (OVI) are

enabled or disabled when the OVF flag in TCSR is set

to 1.

0: OVF interrupt requests (OVI) are disabled

1: OVF interrupt requests (OVI) are enabled

4, 3

CCLR[1:0]

R/W

Counter Clear 1 and 0*

These bits select the method by which TCNT is

cleared.

00: Clearing is disabled

01: Cleared by compare match A

10: Cleared by compare match B

11: Cleared at rising edge (TMRIS in TCCR is cleared

to 0) of the external reset input or when the external

reset input is high (TMRIS in TCCR is set to 1)

2 to 0

CKS[2:0]

000

R/W

Clock Select 2 to 0*

These bits select the clock input to TCNT and count

condition. See table 13.2.

Note:

To use an external reset or external clock, the function of the corresponding pin should

be selected using the pin function controller (PFC). For details, see section 25, Pin

Function Controller (PFC).

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