SH7261 datasheet(642/1348 Pages) RENESAS

642 / 1348 page

Section 13 8-Bit Timers (TMR)

Rev. 2.00 Sep. 07, 2007 Page 610 of 1312

REJ09B0320-0200

• TCSR_0

Bit

Bit Name

Initial

Value

R/W

Description

CMFB

R/(W)*

Compare Match Flag B

[Setting condition]

• When TCNT matches TCORB

[Clearing condition]

• When writing 0 after reading CMFB = 1

CMFA

R/(W)*

Compare Match Flag A

[Setting condition]

• When TCNT matches TCORA

[Clearing condition]

• When writing 0 after reading CMFA = 1

OVF

R/(W)*

Timer Overflow Flag

[Setting condition]

• When TCNT overflows from H'FF to H'00

[Clearing condition]

• When writing 0 after reading OVF = 1

ADTE

R/W

A/D Trigger Enable

Selects enabling or disabling of A/D converter start

requests by compare match A.

0: A/D converter start requests by compare match A are

disabled

1: A/D converter start requests by compare match A are

enabled

3, 2

OS[3:2]

R/W

Output Select 3 and 2*

These bits select a method of TMO pin output when

compare match B of TCORB and TCNT occurs.

00: No change when compare match B occurs

01: 0 is output when compare match B occurs

10: 1 is output when compare match B occurs

11: Output is inverted when compare match B occurs

(toggle output)

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