SH7261 datasheet(644/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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644 / 1348 page

Section 13 8-Bit Timers (TMR)

Rev. 2.00 Sep. 07, 2007 Page 612 of 1312

REJ09B0320-0200

Bit

Bit Name

Initial

Value

R/W

Description



Reserved

This is a read-only bit and cannot be modified.

3, 2

OS[3:2]

R/W

Output Select 3 and 2*

These bits select a method of TMO pin output when

compare match B of TCORB and TCNT occurs.

00: No change when compare match B occurs

01: 0 is output when compare match B occurs

10: 1 is output when compare match B occurs

11: Output is inverted when compare match B occurs

(toggle output)

1, 0

OS[1:0]

R/W

Output Select 1 and 0*

These bits select a method of TMO pin output when

compare match A of TCORA and TCNT occurs.

00: No change when compare match A occurs

01: 0 is output when compare match A occurs

10: 1 is output when compare match A occurs

11: Output is inverted when compare match A occurs

(toggle output)

Notes: 1. Only 0 can be written to bits 7 to 5, to clear these flags.

2. Timer output is disabled when bits OS3 to OS0 are all 0. Timer output is 0 until the first

compare match occurs after resetting.

SH7261 Datasheet(PDF) 644 Page - Renesas Technology Corp