SH7261 datasheet(667/1348 Pages) RENESAS

Part #	SH7261

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series

PDF	1348 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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667 / 1348 page

Section 14 Watchdog Timer (WDT)

Rev. 2.00 Sep. 07, 2007 Page 635 of 1312

REJ09B0320-0200

14.4.4

Using Interval Timer Mode

When operating in interval timer mode, interval timer interrupts are generated at every overflow of

the counter. This enables interrupts to be generated at set periods.

1. Clear the WT/

IT bit in WTCSR to 0, set the type of count clock in the CKS[2:0] bits in

WTCSR, and set the initial value of the counter in WTCNT.

2. Set the TME bit in WTCSR to 1 to start the count in interval timer mode.

3. When the counter overflows, the WDT sets the IOVF bit in WTCSR to 1 and an interval timer

interrupt request is sent to the INTC. The counter then resumes counting.

H'FF

ITI

H'00

WTCNT value

ITI: Interval timer interrupt request generation

WT/

IT = 0

TME = 1

Time

Overflow

[Legend]

Figure 14.5 Operation in Interval Timer Mode

SH7261 Datasheet(PDF) 667 Page - Renesas Technology Corp