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SH7018 Datasheet(PDF) 370 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 370 Page - Renesas Technology Corp |
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370 / 431 page ![]() 354 16.8.2 Software Protection Software protection can be implemented by setting the SWE bit in flash memory control register 1 (FLMCR1), the RAMS bit in erase block register 1 (EBR1), erase block register 2 (EBR2), and RAM emulation register (RAMER). When software protection is in effect, setting the P or E bit in flash memory control register 1 (FLMCR1) does not cause a transition to program mode or erase mode. (See table 16.9.) Table 16.9 Software Protection Functions Item Description Program Erase SWE bit protection • Clearing the SWE bit to 0 in FLMCR1 sets the program/erase-protected state for all blocks. (Execute in on-chip RAM or external memory.) Yes Yes Block specification protection • Erase protection can be set for individual blocks by settings in erase block register 1 (EBR1) and erase block register 2 (EBR2). • Setting EBR1 and EBR2 to H'00 places all blocks in the erase-protected state. — Yes Emulation protection • Setting the RAMS bit to 1 in the RAM emulation register (RAMER) places all blocks in the program/erase-protected state. Yes Yes |
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