SH7018 datasheet(374/431 Pages) RENESAS

374 / 431 page

358

H'000000

H'004000

H'0073FF

H'008000

H'027FFF

H'007000

H'0043FF

H'005000

H'006000

H'0053FF

H'0063FF

Flash memory

EB0 to EB3

Flash memory

EB8 to EB10

This area can be accessed

from both the RAM area

and flash memory area

H'FFFFF800

H'FFFFFBFF

On-chip RAM

EB4

(1 kB)

(3 kB)

(1 kB)

(3 kB)

(1 kB)

(3 kB)

(1 kB)

(3 kB)

EB7

EB6

EB5

Figure 16.16 Example of RAM Overlap Operation

Example in Which Flash Memory Block Area (EB4) is Overlapped

1. Set bits RAMS, RAM1, and RAM0 in RAMER to 1, 0, 0, to overlap part of RAM

(H'FFFFF800 to H'FFFFFBFF) onto the area (part of EB4: H'004000 to H'0043FF) for which

real-time programming is required.

2. Real-time programming is performed using the overlapping RAM.

3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.

4. The data written in the overlapping RAM is written into the flash memory space (EB4).

Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks

regardless of the value of RAM1 and RAM0 (emulation protection). In this state,

setting the P or E bit in flash memory control register 1 (FLMCR1) will not cause a

transition to program mode or erase mode. When actually programming a flash

memory area, the RAMS bit should be cleared to 0.

SH7018 Datasheet(PDF) 374 Page - Renesas Technology Corp

SH7018 Datasheet(HTML) 374 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL