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SH7018 Datasheet(PDF) 261 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 261 Page - Renesas Technology Corp |
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261 / 431 page ![]() 245 12.3.4 Clock Synchronous Operation In the clock synchronous mode, the SCI1 transmits and receives data in synchronization with clock pulses. This mode is suitable for high-speed serial communication. The SCI1 transmitter and receiver are independent, so full duplex communication is possible while sharing the same clock. The transmitter and receiver are also double buffered, so continuous transmitting or receiving is possible by reading or writing data while transmitting or receiving is in progress. Figure 12.14 shows the general format in clock synchronous serial communication. Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 LSB MSB Synchroni- zation clock Serial data * * Transfer direction One unit (character or frame) of communication data Note: * High except in continuous transmitting or receiving. Figure 12.14 Data Format in Clock Synchronous Communication In clock synchronous serial communication, each data bit is output on the communication line from one falling edge of the serial clock to the next. Data are guaranteed valid at the rising edge of the serial clock. In each character, the serial data bits are transmitted in order from the LSB (first) to the MSB (last). After output of the MSB, the communication line remains in the state of the MSB. In the clock synchronous mode, the SCI1 transmits or receives data by synchronizing with the falling edge of the synchronization clock. Communication Format: The data length is fixed at eight bits. No parity bit or multiprocessor bit can be added. Clock: An internal clock generated by the on-chip baud rate generator or an external clock input from the SCK pin can be selected as the SCI1 transmit/receive clock. The clock source is selected by the C/ A bit in the serial mode register (SMR1) and bits CKE1 and CKE0 in the serial control register (SCR1). See table 12.9. When the SCI1 operates on an internal clock, it outputs the clock signal at the SCK pin. Eight clock pulses are output per transmitted or received character. When the SCI1 is not transmitting or receiving, the clock signal remains in the high state. |
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