SH7052 datasheet(511/919 Pages) RENESAS

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Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

LSB

MSB

Serial clock

Serial data

Transfer direction

One unit (character or frame) of communication data

Note: * High except in continuous transmitting or receiving.

Figure 14.17 Data Format in Synchronous Communication

In synchronous serial communication, each data bit is output on the communication line from one

falling edge of the serial clock to the next. Data is guaranteed valid at the rising edge of the serial

clock. In each character, the serial data bits are transmitted in order from the LSB (first) to the

MSB (last). After output of the MSB, the communication line remains in the state of the MSB. In

synchronous mode, the SCI transmits or receives data by synchronizing with the rise of the serial

clock.

Communication Format: The data length is fixed at eight bits. No parity bit or multiprocessor bit

can be added.

Clock: An internal clock generated by the on-chip baud rate generator or an external clock input

from the SCK pin can be selected as the SCI transmit/receive clock. The clock source is selected

by the C/

A bit in the serial mode register (SMR) and bits CKE1 and CKE0 in the serial control

When the SCI operates on an internal clock, it outputs the clock signal at the SCK pin. Eight clock

pulses are output per transmitted or received character. When the SCI is not transmitting or

receiving, the clock signal remains in the high state. An overrun error occurs only during the

receive operation, and the serial clock is output until the RE bit is cleared to 0. To perform a

receive operation in one-character units, select an external clock for the clock source.

SH7052 Datasheet(PDF) 511 Page - Renesas Technology Corp