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SH7052 Datasheet(PDF) 533 Page - Renesas Technology Corp

Part # SH7052
Description  SuperHTM RISC engine
PDF  919 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7052 Datasheet(HTML) 533 Page - Renesas Technology Corp

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• Bit 1—Halt Request (MCR1): Controls halting of the HCAN module.
Bit 1: MCR1
Description
0
Normal operating mode
(Initial value)
1
Halt mode transition request
• Bit 0—Reset Request (MCR0): Controls resetting of the HCAN module.
Bit 0: MCR0
Description
0
Normal operating mode (MCR0 = 0 and GSR3 = 0)
[Setting condition]
When 0 is written after an HCAN reset
1
Reset mode transition request
(Initial value)
In order for GSR3 to change from 1 to 0 after 0 is written to MCR0, time is required before the
HCAN is internally reset. There is consequently a delay before GSR3 is cleared to 0 after
MCR0 is cleared to 0.
15.2.2
General Status Register (GSR)
The general status register (GSR) is an 8-bit readable/writable register that indicates the status of
the CAN bus.
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
GSR3
GSR2
GSR1
GSR0
Initial value:
0
0
0
0
1
1
0
0
R/W:
R
R
R
R
R
R
R
R
• Bits 7 to 4—Reserved: These bits always read 0. The write value should always be 0.
• Bit 3—Reset Status Bit (GSR3): Indicates whether the HCAN module is in the normal
operating state or the reset state. This bit cannot be modified.
Bit 3: MCR3
Description
0
Normal operating state
[Setting condition]
After an HCAN internal reset
1
Configuration mode
(Initial value)
[Reset condition]
MCR0-initiated reset state or sleep mode



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