SH7052 datasheet(535/919 Pages) RENESAS

535 / 919 page

509

• Bits 15 and 14—Re-synchronization Jump Width (SJW): These bits set the maximum bit

synchronization range.

Bit 15:

BCR7

Bit 14:

BCR6

Description

Maximum bit synchronization width = 1 time quantum

Maximum bit synchronization width = 2 time quanta

Maximum bit synchronization width = 3 time quanta

Maximum bit synchronization width = 4 time quanta

• Bits 13 to 8—Baud Rate Prescale (BRP): These bits are used to set the CAN bus baud rate.

Bit 13:

BCR5

Bit 12:

BCR4

Bit 11:

BCR3

Bit 10:

BCR2

Bit 9:

BCR1

Bit 8:

BCR0

Description

0000002

× system clock

(Initial value)

0000014

× system clock

0000106

× system clock

⋅

111111

128

× system clock

SYNC_SEG

PRSEG

PHSEG1

PHSEG2

1-bit time

1-bit time (8–25 time quanta)

Quantum

TSEG1 (time segment 1)*

2–16

TSEG2 (time segment 2)*

2–8

SYNC_SEG: Segment for establishing synchronization of nodes on the CAN bus. (Normal

bit edge transitions occur in this segment.)

PRSEG:

Segment for compensating for physical delay between networks.

PHSEG1:

Buffer segment for correcting phase drift (positive). (This segment is extended

when synchronization (re-synchronization) is established.)

PHSEG2:

Buffer segment for correcting phase drift (negative). (This segment is

shortened when synchronization (re-synchronization) is established.)

Note: * The time quanta value for TSEG1 and TSEG2 is the TSEG value + 1.

Figure 15.2 Detailed Description of One Bit

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