SH7052 datasheet(536/919 Pages) RENESAS

536 / 919 page

510

HCAN bit rate calculation:

fCLK

× (BRP + 1) × (3 + TSEG1 + TSEG2)

Bit rate [b/s] =

Note:

CLK = Pφ (peripheral clock (φ/2))

The BCR values are used for BRP, TSEG1, and TSEG2.

BCR Setting Constraints

TSEG1 > TSEG2

≥ SJW

(SJW = 1 to 4)

3 + TSEG1 + TSEG2 = 8 to 25 time quanta

TSEG2 > B'001 (BRP = B'000000)

TSEG2 > B'000 (BRP > B'000000)

These constraints allow the setting range shown in table 15.3 for TSEG1 and TSEG2 in BCR.

Table 15.3

Setting Range for TSEG1 and TSEG2 in BCR

TSEG2 (BCR [14:12])

001

010

011

100

101

110

111

TSEG1

0011

Yes

(BCR [11:8])

0100

Yes*

Yes

0101

Yes*

Yes

0110

Yes*

Yes

0111

Yes*

Yes

1000

Yes*

Yes

1001

Yes*

Yes

1010

Yes*

Yes

1011

Yes*

Yes

1100

Yes*

Yes

1101

Yes*

Yes

1110

Yes*

Yes

1111

Yes*

Yes

Notes: The time quanta value for TSEG1 and TSEG2 is the TSEG value + 1.

* Setting is enabled except when BRP[13:8] = B'000000.

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