SH7052 datasheet(677/919 Pages) RENESAS

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18.3.19

Port J Control Registers H and L (PJCRH, PJCRL)

Port J control registers H and L (PJCRH, PJCRL) are 16-bit readable/writable registers that select

the functions of the 16 multiplex pins in port J. PJCRH selects the functions of the pins for the

upper 8 bits of port J, and PJCRL selects the functions of the pins for the lower 8 bits.

PJCRH and PJCRL are initialized to H'0000 by a power-on reset (excluding a WDT power-on

reset), and in hardware standby mode. They are not initialized in software standby mode or sleep

mode.

Port J Control Register H (PJCRH)

Bit:

—

PJ15MD

—

PJ14MD

—

PJ13MD

—

PJ12MD

Initial value:

R/W:

R/W

Bit:

—

PJ11MD

—

PJ10MD

—

PJ9MD

—

PJ8MD

Initial value:

R/W:

R/W

• Bit 15—Reserved: This bit always reads 0. The write value should always be 0.

• Bit 14—PJ15 Mode Bit (PJ15MD): Selects the function of pin PJ15/TI9F.

Bit 14: PJ15MD

Description

General input/output (PJ15)

(Initial value)

ATU event counter input (TI9F)

• Bit 13—Reserved: This bit always reads 0. The write value should always be 0.

• Bit 12—PJ14 Mode Bit (PJ14MD): Selects the function of pin PJ14/TI9E.

Bit 12: PJ14MD

Description

General input/output (PJ14)

(Initial value)

ATU event counter input (TI9E)

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