SH7052 datasheet(864/919 Pages) RENESAS

864 / 919 page

838

24.3.10

A/D Converter Timing

Table 24.15 shows A/D converter timing.

Table 24.15 A/D Converter Timing

Conditions: V

CC = PLLVCC = 3.3 V ±0.3 V, PVCC1 = 5.0 V ±0.5 V/3.3 V ±0.3 V,

CC2 = 5.0 V ±0.5 V, AVCC = 5.0 V ±0.5 V, AVref = 4.5 V to AVCC,

SS = PLLVSS = AVSS = 0 V, Ta = –40°C to 85°C.

When PV

CC1 = 3.3 V ±0.3 V, VCC = PVCC1.

When writing or erasing flash EEPROM, T

a = –40°C to 85°C.

CSK = 0:

fop = 20 to 40 MHz

CSK = 1:

fop = 20 MHz

Item

Symbol

Min

Typ

Max

Min

Typ

Max

Unit

Figure

External trigger input

start delay time

TRGS

——

Figure

24.18

A/D conversion

time

CONV

518

—

532

262

—

268

cyc

Figure

24.19

A/D conversion start

delay time

—

cyc

Input sampling time

SPL

—

128

——

cyc

ADTRG input

ADCR

(ADST = 1 set)

4 to 6 states

tTRGS

VOH

Figure 24.18 External Trigger Input Timing

SH7052 Datasheet(PDF) 864 Page - Renesas Technology Corp

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