SH7052 datasheet(203/919 Pages) RENESAS

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177

Table 10.1

ATU-II Functions (cont)

Item

Channels 6, 7

Channel 8

Channel 9

Channel 10

Channel 11

Counter

configu-

ration

Clock

sources

(

φ to φ/32) ×

(1/2n)

(n = 0 to 5)

(

φ to φ/32) ×

(1/2n)

(n = 0 to 5)



(

φ to φ/32)

(φ to φ/32) ×

(1/2n)

(n = 0 to 5)

TCLKA, TCLKB

Counters

TCNT6A to D,

TCNT7A to D

DCNT8A to P

ECNT9A to F

TCNT10AH,

TCNT10AL,

TCNT10B to H

TCNT11

General

registers

————

GR11A, GR11B

Dedicated

input

capture

—

ICR10AH,

ICR10AL

—

Dedicated

output

compare

—

GR9A to F

GR10G

—

PWM

output

CYLR6A to D,

CYLR7A to D,

DTR6A to D,

DTR7A to D,

BFR6A to D,

BFR7A to D

————

Input pins

—

TI9A to F

TI10

—

I/O pins

—————

Output pins

TO6A to D,

TO7A to D

TO8A to P

—

Counter clearing

function

O—

OO—

Interrupt sources

8 sources

Compare-match

× 8

16 sources

Underflow

× 16

6 sources

Compare-match

× 6

3 sources

Compare-match

× 2, dual input

capture/compare-

match

× 1

3 sources

Compare-match

× 2, overflow × 1

Inter-channel and

inter-module

connection signals

DMAC activation

compare-match

signal output

Channel 1 and 2

compare-match

signal trigger

input to one-shot

pulse output

down-counter

Compare-match

signal channel 3

capture trigger

output

Compare-match

signal channel 0

capture trigger

output

Channel 1 and 2

counter clear

output

Compare-match

signal output to

APC

O: Available

—: Not available

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