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SH7052 Datasheet(PDF) 200 Page - Renesas Technology Corp |
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SH7052 Datasheet(HTML) 200 Page - Renesas Technology Corp |
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200 / 919 page ![]() 174 • Channel 2 has eight 16-bit output compare registers, eight general registers, and one dedicated input capture register. The output compare registers can also be selected for one-shot pulse offset in combination with the channel 8 down-counter. General registers (GR2A to H) can be used as input capture or output compare registers Waveform output by means of compare-match: Selection of 0 output, 1 output, or toggle output Input capture function: Rising-edge, falling-edge, or both-edge detection Channel 0 input signal (TI0A) can be captured as trigger Provision for forcible cutoff of channel 8 down-counters (DCNT8A to H) Compare-match interrupts/capture interrupts and counter overflow interrupts can be generated • Channels 3 to 5 each have four general registers, allowing the following operations: Selection of input capture, output compare, PWM mode Waveform output by means of compare-match: Selection of 0 output, 1 output, or toggle output Input capture function: Rising-edge, falling-edge, or both-edge detection Channel 9 compare-match signal can be captured as trigger (channel 3 only) Compare-match interrupts/capture interrupts can be generated • Channels 6 and 7 have four 16-bit duty registers, four cycle registers, and four buffer registers, allowing the following operations: Any cycle and duty from 0 to 100% can be set Duty buffer register value transferred to duty register every cycle Interrupts can be generated every cycle Complementary PWM output can be set (channel 6 only) • Channel 8 has sixteen 16-bit down-counters for one-shot pulse output, allowing the following operations: One-shot pulse generation by down-counter Down-counter can be rewritten during count Interrupt can be generated at end of down-count Offset one-shot pulse function available Can be linked to channel 1 and 2 output compare functions • Channel 9 has six event counters and six output compare registers, allowing the following operations: Event counters can be cleared by compare-match Rising-edge, falling-edge, or both-edge detection available for external input Compare-match signal can be input to channel 3 |
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